Device: JW948 [FBGA162]
Manufacturer: Micron
Part number description for this device:
Move the cursor over the box to highlight particular sectionMT | Micron Technology | |
XXXZ* | Product Family | 29C = SLC NAND + LPDDR (MCP/PoP) 29D = SLC NAND + LPDDR + MLC e-MMC (MCP/PoP) 29J = LPDDR + SLC e-MMC 29K = LPDDR + MLC e-MMC 29M = LPDDR2-S4 + SLC e-MMC 29P = LPDDR2-S4 + MLC e-MMC 29Q = SLC e-MMC + MLC e-MMC (MCP/PoP) 29R = LPDDR2-S4 + SLC NAND 29T = LPDDR3-S4 + MLC e-MMC 29U = LPDDR3-S4 + SLC NAND 29V = LPDDR-S4 + MLC/TLC e-MMC/UFS *Z = is used as a placeholder character |
X | NAND Flash Density | T = 768Mbit U = 640Mbit V = 512Mbit W = 256Mbit X = 128Mbit Y = 64Mbit 1 = 1Gbit 2 = 2Gbit 3 = 3Gbit 4 = 4Gbit 6 = 6Gbit 7 = 7Gbit 8 = 8Gbit 9 = 12Gbit A = 16Gbit B = 48Gbit C = 64Gbit *Z = is used a placeholder character |
X | NAND Flash Width | A = x4 B = x8 C = x16 D = x32 E = x64 F = x96 *Z = is used as a placeholder character |
X | LPDRAM Density | T = 768Mbit U = 640Mbit V = 512Mbit W = 256Mbit X = 128Mbit Y = 64Mbit 1 = 1Gbit 2 = 2Gbit 3 = 3Gbit 4 = 4Gbit 6 = 6Gbit 7 = 7Gbit 8 = 8Gbit 9 = 12Gbit A = 16Gbit B = 48Gbit C = 64Gbit *Z = is used as a placeholder character |
X | LPDRAM Width | A = x4 B = x8 C = x16 D = x32 E = x64 F = x96 *Z = is used as a placeholder character |
X | e-MMC Density | V = 512MByte W = 256MByte X = 128MByte Y = 64MByte 1 = 1GByte 2 = 2GByte 4 = 4GByte 5 = 8GByte 6 = 16GByte 7 = 32GByte 8 = 64GByte 9 = 128GByte A = 256GByte B = 512GByte *Z = is used as a placeholder character |
X | e-MMC Controller Version | A = e-MMC version 4.41 PL_REG B = e-MMC version 4.51 DC PL_REG C = e-MMC version 4.41 DC PL_REG D = e-MMC E = e-MMC version 5.1 F = e-MMC version 1.3 H = e-MMC version 1.8 J = e-MMC version 5.0 K = e-MMC version 4.2 L = e-MMC version 4.2/4.3 M = e-MMC version 4.2/4.3 N = e-MMC version 4.4 P = e-MMC version 4.4 Q = e-MMC version 4.4 R = e-MMC version 4.41 S = e-MMC version 4.41 T = e-MMC version 4.41 U = e-MMC version 4.41 V = e-MMC version 4.5 W = e-MMC version 4.5 X = e-MMC version 4.41 Y = e-MMC version 5.0 *Z |
X | Operating Voltage Range | A = NAND: Vcc=N/A; LPDRAM: Vdd=1.8V, Vddq=1.8V; e-MMC: Vccm=1.8V, Vccqm=1.8V B = NAND: Vcc=1.8V; LPDRAM: Vdd=1.8V, Vddq=1.2V; e-MMC: Vccm=1.8V, Vccqm=1.8V C = NAND: Vcc=1.8V; LPDRAM: Vdd=1.35V, Vddq=1.2V; e-MMC: Vccm=1.8V, Vccqm=1.8V D = NAND: Vcc=1.8V; LPDRAM: Vdd=1.2V, Vddq=1.2V; e-MMC: Vccm=1.8V, Vccqm=1.8V E = NAND: Vcc=1.8; LPDRAM: Vdd=1.8V, Vddq=1.8V; e-MMC: Vccm=3.3V, Vccqm=1.8/3.3V F = NAND: Vcc=1.8V; LPDRAM: Vdd=1.8V, Vddq=1.8V; e-MMC: Vccm=1.8V, Vccqm=1.8V G = NAND: Vcc=N/A; LPDRAM: Vdd=1.8V, Vddq=1.8V; e-MMC: Vccm=3.3V, Vccqm=1.8/3.3V H = NAND: Vcc=1.8V; LPDRAM: Vdd=1.2V, Vddq=1.2V; e-MMC: Vccm=N/A, Vccqm=N/A J = NAND: Vcc=N/A; LPDRAM: Vdd=1.2V, Vddq=1.2V; e-MMC: Vccm=1.8V, Vccqm=1.8V K = NAND: Vcc=N/A; LPDRAM: Vdd=1.2V, Vddq=1.2V; e-MMC: Vccm=3.3V, Vccqm=1.8/3.3V L = NAND: Vcc=N/A; LPDRAM: Vdd=N/A, Vddq=1.2V; e-MMC: Vccm=1.8V, Vccqm=1.8/3.3V M = NAND: Vcc=1.8V; LPDRAM: Vdd=1.8V, Vddq=1.2V; e-MMC: Vccm=1.8V, Vccqm=N/A N = NAND: Vcc=3.3V; LPDRAM: Vdd=1.2V, Vddq=1.2V; e-MMC: Vccm=N/A, Vccqm=N/A P = NAND: VCC=N/A; LPDRAM: VDD=1.1V, VDDQ=1.1V, e-MMC: VCCM=3.3V, VCCQM = 1.8V Q = NAND: VCC=N/A; LPDRAM: VDD=1.1V, VDDQ=0.6V, e-MMC: VCCM=3.3V, VCCQM = 1.8V R = NAND: VCC=N/A; LPDRAM: VDD=1.1V, VDDQ=0.4V, e-MMC: VCCM=3.3V, VCCQM = 1.8V |
X | Chip Count | A = 1 NAND Flash (CE#0); 1 LPDRAM; 1 e-MMC B = 2 NAND Flash (CE#0); 1 LPDRAM; 1 e-MMC C = 1 NAND Flash (CE#0); 2 LPDRAM (CS0#0)/CS1#; 1 e-MMC D = 2 NAND Flash (CE#0); 2 LPDRAM (CS0#/CS1#); 1 e-MMC E = 0 NAND Flash; 1 LPDRAM; 1 e-MMC F = 0 NAND Flash; 2 LPDRAM (CS0#/CS1#); 1 e-MMC G = 1 NAND Flash; 1 LPDRAM; 0 e-MMC H = 1 NAND Flash; 2 LPDRAM; 0 e-MMC I = 2 NAND Flash; 2 LPDRAM; 0 e-MMC J = 0 NAND Flash; 0 LPDRAM; 2 e-MMC K = 0 NAND Flash; 4 LPDRAM; 1 e-MMC L = 0 NAND Flash; 3 LPDRAM; 1 e-MMC M = 2 NAND Flash; 1 LPDRAM; 0 e-MMC N = 4 NAND Flash; 4 LPDRAM, 0 e-MMC O = 0 NAND Flash, 6 LPDRAM; 1 e-MMC |
XX | Packge Code | Contact factory |
X | LPDRAM Speed Grade | 046 = 2133MHz (LPDDR 4266) 062 = 1600MHz (LPDDR 3200) 107 = 933MHz (LPDDR 1866) 125 = 800MHz (LPDDR1600) 18 = 533MHz CL8 (LPDDR 1066) 25 = 400MHz CL6 (LPDDR 800) 3 = 333MHz CL5 (LPDDR 667) 37 = 266MHz CL4 (LPDDR 533) 5 = 200MHz CL3 (LPDDR 400) 53 = 1866MHz (LPDDR 3732) 54 = 128MHz CL3 (LPDDR 1) 6 = 166MHz CL3 (LPDDR 333) 75 = 133MHz CL3 (LPDDR 266) |
X | Operating Temperature Range | A = Automotive (-40°C to 105°C) I = Industrial (-40°C to 85°C) W = Wireless (-25°C to 85°C) |
X | Special Options | Blank = Standard A = Customer variant B = 2MB boot area / 2MB RPMB E = On-die ECC enabled F = SEC COUNT / custom boot area / custom RPBM |
XX | Production Status | Blank = Production ES = Engineering samples MS = Mechanical samples |
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XXX | Die Revision Code | Contact factory |
Note: Part number description table describes usual part-numbering system for more chips, therefore this table can contain information, that might not be valid for the actually selected chip. The information here are provided on the best-effort basis and might be either inaccurate or incoplete. Therefore always check the latest datasheet of the chip for part number description detail. If you find some inaccuracy, let us please know.
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